1. Field of the Invention
The present invention relates to a logarithmic amplifier circuit and more particularly, to a tunable logarithmic amplifier circuit that is formed on a semiconductor integrated circuit device and that can provide a wide input dynamic range, good logarithmic accuracy, wide operating temperature range, and variable logarithmic characteristic.
2. Description of the Prior Art
In general, a logarithmic amplifier circuit includes n differential amplifiers cascade connected, n+1 full-wave rectifiers, and an adder, where n is an integer.
A first one of the n amplifiers produces an output signal in response to an initial input signal to be amplified. The remaining n+1 of the n amplifiers produce output signals in response to an amplified output signal by a preceding one of the amplifiers, respectively.
A first one of the n+1 full-wave rectifiers rectifies the initial input signal and produces a first rectified output signal. The remaining n of the n+1 full-wave rectifiers rectifies the output signals of the n differential amplifiers and produces n respective rectified output signals.
The adder adds the rectified output signals of the n+1 full-wave rectifiers to thereby produce an output signal with a logarithmic characteristic.
With a conventional logarithrmic amplifier circuit of this type, each of the full-wave rectifiers is formed by using two unbalanced differential pairs of bipolar or metal-oxide-semiconductor (MOS) transistors. The two transistors forming the differential pair have different emitter-area ratios or different gate-width (W) to gate-length (L) ratios, i.e, (W/L). The input ends of the two differential pairs are cross-coupled, and the output ends thereof are parallel-coupled.
This conventional logarithmic amplifier circuit was, for example, disclosed in the Japanese Non-Examined Patent Publication Nos. 62-293807 published in 1987, 62-292010 published in 1987, and 4-165805 published in 1992. The principle and operation of this conventional logarithmic amplifier circuit was described in detail in IEEE Transactions on Circuits and Systems-I, Vol. 39, No. 9, pp 771-777, September, 1992.
With the conventional logarithmic amplifier circuit described as above, the n differential amplifiers cascade connected and the n+1 full-wave rectifiers are necessary. As a result, not only the circuit scale becomes large but also the number of the necessary current sources increases.
Specifically, the conventional amplifier requires driving current sources for the individual differential. pairs. Also, the amplifier requires large capacitances to be added because the two transistors with relatively large emitter area ratios or gate-length to gate-width ratios have coupled collectors or drains. Accordingly, the total driving current tends to become large to improve the frequency characteristics occurs. This causes a problem that current consumption reduction is difficult to be realized.
Further, another problem that the basic logarithmic characteristics such as the logarithmic accuracy, slope of the characteristic curve, and dynamic range cannot be adjusted occurs.